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QUAD DRIVER SY100S313 FEATURES s s s s s s s s s Max. propagation delay of 800ps Enable to Output max. of 950ps IEE min. of -60mA Extended supply voltage option: VEE = -4.2V to -5.5V Voltage and temperature compensation for improved noise immunity Internal 75K input pull-down resistors 50% faster than Fairchild 300K Function and pinout compatible with Fairchild F100K Available in 24-pin CERPACK and 28-pin PLCC packages DESCRIPTION The SY100S313 offers four drivers with two OR and two NOR outputs, designed for use in high-performance ECL systems. The four drivers are controlled by a common Enable signal which is buffered to minimize input loading. If the D inputs are not used, the Enable signal can be used to drive sixteen 50 lines. All inputs have 75K pulldown resistors and all outputs are buffered. PIN CONFIGURATIONS O2a Oa VEES O1a O2a O2b O1b 11 10 9 8 7 6 5 Da Db VEE VEES 12 13 14 15 16 17 18 4 3 Top View PLCC J28-1 2 1 28 27 26 19 20 21 22 23 24 25 VEES O2d O2c O2d O1d O1c o1d O2b O1b VCCA VCC VCC O1c O2c BLOCK DIAGRAM O1a O2a O1a O2a O1b O2b O1b O2b Dc O1c O2c O1c O2c Dd E O1d O2d O1d O2d E Dc Dd VEE Db Dd O1d O2d O1d O2d O2c O1c 1 2 3 4 5 6 24 23 22 21 20 19 18 Top View Flatpack F24-1 17 16 15 14 Da Dc E Da O1a O2a O1a O2a O2b O1b Db 13 7 8 9 10 11 12 O2c O1c VCC VCCA PIN NAMES Pin Da - Dd E Ona - Ond Ona - Ond VEES VCCA Function Data Inputs (n-1...5) Enable Input Data Outputs Complementary Data Outputs VEE Substrate VCCO for ECL Outputs Rev.: G Amendment: /0 1 Issue Date: July, 1999 O1b O2b Micrel SY100S313 LOGIC EQUATION O=D+E O=D+E DC ELECTRICAL CHARACTERISTICS VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND Symbol IIH IEE Parameter Input HIGH Current, All Inputs Power Supply Current Min. -- -60 Typ. -- -43 Max. 200 -20 Unit A mA Condition VIN = VIH (Max.) Inputs Open AC ELECTRICAL CHARACTERISTICS CERPACK VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND TA = 0C Symbol tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay Data to Output Propagation Delay Enable to Output Transition Time 20% to 80%, 80% to 20% Min. 200 300 300 Max. 850 1000 900 TA = +25C Min. 200 300 300 Max. 850 1000 900 TA = +85C Min. 200 300 300 Max. 850 1000 900 Unit ps ps ps Condition PLCC VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND TA = 0C Symbol tPLH tPHL tPLH tPHL tTLH tTHL Parameter Propagation Delay Data to Output Propagation Delay Enable to Output Transition Time 20% to 80%, 80% to 20% Min. 200 300 300 Max. 800 950 900 TA = +25C Min. 200 300 300 Max. 800 950 900 TA = +85C Min. 200 300 300 Max. 800 950 900 Unit ps ps ps Condition 2 Micrel SY100S313 TIMING DIAGRAM 0.7 0.1 ns INPUT 80% 50% 20% -1.69V TRUE tPHL tPLH 0.7 0.1 ns -0.95V 50% OUTPUT tPLH tPHL 80% 50% 20% tTLH tTHL COMPLEMENT Propagation Delay and Transition Times NOTE: VEE = -4.2V to -5.5V unless otherwise specified, VCC = VCCA = GND PRODUCT ORDERING CODE Ordering Code SY100S313FC SY100S313JC SY100S313JCTR Package Type F24-1 J28-1 J28-1 Operating Range Commercial Commercial Commercial 3 Micrel SY100S313 24 LEAD CERPACK (F24-1) Rev. 03 4 Micrel SY100S313 28 LEAD PLCC (J28-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA FAX + 1 (408) 980-9191 + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated 5 |
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